Project Description

Dual Ethernet W5500 RS232 / 485 CAN then FPGA development board DE2

mingqian W5500 FPGA Development Board


  • W5500: use NIOS II control W5500 to achieve Ethernet protocol, provide  source code and 2.5 hours tutorial video
  • CAN interface: Provides pure Verilog control data for CAN interface to send and receive data and use NIOS II control data transceiver sample source code.
  • RTL8201: Ethernet UDP self-test routines
  • 232,485: No sample source code required
  • Schematic diagram
  • Fine mechanical dimensions chart
  • CAN Tutorial keynote


FPGAs have a unique advantage in handling various communications because of the parallel processing features of FPGAs that enable them to perform data acquisition, protocol conversion, and data reception independently without affecting each other, so that they can be efficiently and response quickly.

The communication expansion card integrates two Ethernet functions, two 232 interfaces, two CAN interfaces and one RS-485 interface. Two Ethernet are implemented in different ways to facilitate user learning and evaluation. One of the first Ethernet Ethernet single-chip Ethernet protocol is implement using hardwired TCP/IP chip W5500, convenient and fast. The second Ethernet and physical layer Ethernet transceiver chip, and in the FPGA using MAC layer IP core implementation, to provide more customized features.






TB2NF9zqpXXXXaKXXXXXXXXXXXX_!!646909549 TB21kMpX43X61Bjy0FlXXaGtVXa_!!646909549